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Infineon /XMC1300 /PORT1 /IN

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Interpret as IN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)P0 0 (value1)P1 0 (value1)P2 0 (value1)P3 0 (value1)P4 0 (value1)P5 0 (value1)P6

P3=value1, P6=value1, P2=value1, P1=value1, P4=value1, P0=value1, P5=value1

Description

Port 1 Input Register

Fields

P0

Port 1 Input Bit 0

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.
P1

Port 1 Input Bit 1

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.
P2

Port 1 Input Bit 2

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.
P3

Port 1 Input Bit 3

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.
P4

Port 1 Input Bit 4

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.
P5

Port 1 Input Bit 5

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.
P6

Port 1 Input Bit 6

0 (value1): The input level of P1.x is 0.

1 (value2): The input level of P1.x is 1.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data