Infineon /XMC1300 /PORT2 /OUT

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as OUT

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)P0 0 (value1)P1 0 (value1)P2 0 (value1)P3 0 (value1)P4 0 (value1)P5 0 (value1)P6 0 (value1)P7 0 (value1)P8 0 (value1)P9 0 (value1)P10 0 (value1)P11

P5=value1, P3=value1, P0=value1, P10=value1, P2=value1, P6=value1, P8=value1, P7=value1, P1=value1, P11=value1, P9=value1, P4=value1

Description

Port 2 Output Register

Fields

P0

Port 2 Output Bit 0

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P1

Port 2 Output Bit 1

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P2

Port 2 Output Bit 2

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P3

Port 2 Output Bit 3

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P4

Port 2 Output Bit 4

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P5

Port 2 Output Bit 5

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P6

Port 2 Output Bit 6

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P7

Port 2 Output Bit 7

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P8

Port 2 Output Bit 8

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P9

Port 2 Output Bit 9

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P10

Port 2 Output Bit 10

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

P11

Port 2 Output Bit 11

0 (value1): The output level of P2.x is 0.

1 (value2): The output level of P2.x is 1.

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