Infineon /XMC1300 /PPB /ICSR

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Interpret as ICSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)VECTACTIVE0 (value1)VECTPENDING0 (value1)ISRPENDING 0 (value1)PENDSTCLR 0 (value1)PENDSTSET 0 (value1)PENDSVCLR 0 (value1)PENDSVSET

PENDSVSET=value1, PENDSVCLR=value1, VECTACTIVE=value1, ISRPENDING=value1, PENDSTSET=value1, VECTPENDING=value1, PENDSTCLR=value1

Description

Interrupt Control and State Register

Fields

VECTACTIVE

Active Exception Number

0 (value1): Thread mode

VECTPENDING

Pending Exception Number

0 (value1): No pending exceptions

ISRPENDING

Interrupt Pending Flag

0 (value1): Interrupt not pending

1 (value2): Interrupt pending.

PENDSTCLR

SysTick Exception Clear-pending

0 (value1): No effect

1 (value2): removes the pending state from the SysTick exception.

PENDSTSET

SysTick Exception Set-pending

0 (value1): SysTick exception is not pending

1 (value2): SysTick exception is pending.

PENDSVCLR

PendSV Clear Pending

0 (value1): Do not clear.

1 (value2): Removes pending state from PendSV exception.

PENDSVSET

PendSV Set Pending

0 (value1): PendSV exception is not pending.

1 (value2): PendSV excepton is pending.

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