Infineon /XMC1300 /VADC_G0 /ASCTRL

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Interpret as ASCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)SRCRESREG 0XTSEL0 (XTLVL)XTLVL 0 (value1)XTMODE 0 (value1)XTWC 0GTSEL0 (GTLVL)GTLVL 0 (value1)GTWC 0 (value1)TMEN 0 (value1)TMWC

SRCRESREG=value1, TMWC=value1, GTWC=value1, XTMODE=value1, TMEN=value1, XTWC=value1

Description

Autoscan Source Control Register

Fields

SRCRESREG

Source-specific Result Register

0 (value1): Use GxCHCTRy.RESREG to select a group result register

1 (value2): Store result in group result register GxRES1

15 (value3): Store result in group result register GxRES15

XTSEL

External Trigger Input Selection

XTLVL

External Trigger Level

XTMODE

Trigger Operating Mode

0 (value1): No external trigger

1 (value2): Trigger event upon a falling edge

2 (value3): Trigger event upon a rising edge

3 (value4): Trigger event upon any edge

XTWC

Write Control for Trigger Configuration

0 (value1): No write access to trigger configuration

1 (value2): Bitfields XTMODE and XTSEL can be written

GTSEL

Gate Input Selection

GTLVL

Gate Input Level

GTWC

Write Control for Gate Configuration

0 (value1): No write access to gate configuration

1 (value2): Bitfield GTSEL can be written

TMEN

Timer Mode Enable

0 (value1): No timer mode: standard gating mechanism can be used

1 (value2): Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled

TMWC

Write Control for Timer Mode

0 (value1): No write access to timer mode

1 (value2): Bitfield TMEN can be written

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