Regviz

Infineon /XMC1300 /VADC_G0 /SEFCLR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SEFCLR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Infineon/XMC4200/VADC_G0/SEFCLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)SEV0 0 (value1)SEV1

SEV0=value1, SEV1=value1

Description

Source Event Flag Clear Register

Fields

SEV0

Clear Source Event 0/1

0 (value1): No action

1 (value2): Clear the source event flag in GxSEFLAG
SEV1

Clear Source Event 0/1

0 (value1): No action

1 (value2): Clear the source event flag in GxSEFLAG

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data