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Infineon /XMC4200 /CCU80 /GPCHK

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Interpret as GPCHK

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https://regviz.com/r/Infineon/XMC1400/CCU80/GPCHK#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PASE)PASE 0 (value1)PACS 0 (value1)PISEL 0 (value1)PCDS 0 (value1)PCTS 0 (PCST)PCST 0PCSEL00PCSEL10PCSEL20PCSEL3

PACS=value1, PISEL=value1, PCTS=value1, PCDS=value1

Description

Parity Checker Configuration

Fields

PASE

Parity Checker Automatic start/stop
PACS

Parity Checker Automatic start/stop selector

0 (value1): CC80

1 (value2): CC81

2 (value3): CC82

3 (value4): CC83
PISEL

Driver Input signal selector

0 (value1): CC8x.GP01 - driver output is connected to event 1 of slice 0

1 (value2): CC8x.GP11 - drive output is connected to event 1 of slice 1

2 (value3): CC8x.GP21 - driver output is connected to event 1 of slice 2

3 (value4): CC8x.GP31 - driver output is connected to event 1 of slice 3
PCDS

Parity Checker Delay Input Selector

0 (value1): CCU8x.IGBTA

1 (value2): CCU8x.IGBTB

2 (value3): CCU8x.IGBTC

3 (value4): CCU8x.IGBTD
PCTS

Parity Checker type selector

0 (value1): Even parity enabled

1 (value2): Odd parity enabled
PCST

Parity Checker XOR status
PCSEL0

Parity Checker Slice 0 output selection
PCSEL1

Parity Checker Slice 1 output selection
PCSEL2

Parity Checker Slice 2 output selection
PCSEL3

Parity Checker Slice 3 output selection

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data