WE_CH1=value1, CH0=value1, WE_CH7=value1, WE_CH3=value1, CH6=value1, WE_CH2=value1, CH7=value1, CH3=value1, CH5=value1, CH2=value1, WE_CH4=value1, CH1=value1, WE_CH5=value1, WE_CH6=value1, CH4=value1, WE_CH0=value1
Mask for Raw IntSrcTran Status
| CH0 | Mask bit for channel 0 0 (value1): masked 1 (value2): unmasked |
| CH1 | Mask bit for channel 1 0 (value1): masked 1 (value2): unmasked |
| CH2 | Mask bit for channel 2 0 (value1): masked 1 (value2): unmasked |
| CH3 | Mask bit for channel 3 0 (value1): masked 1 (value2): unmasked |
| CH4 | Mask bit for channel 4 0 (value1): masked 1 (value2): unmasked |
| CH5 | Mask bit for channel 5 0 (value1): masked 1 (value2): unmasked |
| CH6 | Mask bit for channel 6 0 (value1): masked 1 (value2): unmasked |
| CH7 | Mask bit for channel 7 0 (value1): masked 1 (value2): unmasked |
| WE_CH0 | Write enable for mask bit of channel 0 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH1 | Write enable for mask bit of channel 1 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH2 | Write enable for mask bit of channel 2 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH3 | Write enable for mask bit of channel 3 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH4 | Write enable for mask bit of channel 4 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH5 | Write enable for mask bit of channel 5 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH6 | Write enable for mask bit of channel 6 0 (value1): write disabled 1 (value2): write enabled |
| WE_CH7 | Write enable for mask bit of channel 7 0 (value1): write disabled 1 (value2): write enabled |