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Infineon /XMC4200 /PPB /CPUID

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Interpret as CPUID

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Revision 0PartNo0Constant 0 (value1)Variant0Implementer

Variant=value1

Description

CPUID Base Register

Fields

Revision

Revision number

1 (value1): Patch 1
PartNo

Part number of the processor

3108 (value1): Cortex-M4
Constant

Reads as 0xF
Variant

Variant number

0 (value1): Revision 0
Implementer

Implementer code

65 (value1): ARM

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data