RETTOBASE=value1, VECTPENDING=value1, PENDSTSET=value1, ISRPENDING=value1, PENDSTCLR=value1, PENDSVCLR=value1, VECTACTIVE=value1
Interrupt Control and State Register
| VECTACTIVE | Active exception number 0 (value1): Thread mode |
| RETTOBASE | Return to Base 0 (value1): there are preempted active exceptions to execute 1 (value2): there are no active exceptions, or the currently-executing exception is the only active exception. |
| VECTPENDING | Vector Pending 0 (value1): no pending exceptions |
| ISRPENDING | Interrupt pending flag 0 (value1): interrupt not pending 1 (value2): interrupt pending. |
| PENDSTCLR | SysTick exception clear-pending bit 0 (value1): no effect 1 (value2): removes the pending state from the SysTick exception. |
| PENDSTSET | SysTick exception set-pending bit 0 (value1): no effect 1 (value2): changes SysTick exception state to pending. |
| PENDSVCLR | PendSV clear-pending bit 0 (value1): no effect 1 (value2): removes the pending state from the PendSV exception. |
| PENDSVSET | PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending., |
| NMIPENDSET | NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending., |