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Infineon /XMC4200 /PPB /MPU_RBAR_A2

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Interpret as MPU_RBAR_A2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0REGION0 (value1)VALID 0ADDR

VALID=value1

Description

MPU Region Base Address Register A2

Fields

REGION

MPU region field
VALID

MPU Region Number valid bit

0 (value1): MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field

1 (value2): the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field.
ADDR

Region base address field

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data