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Infineon /XMC4200 /PPB /NVIC_IABR0

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Interpret as NVIC_IABR0

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https://regviz.com/r/Infineon/XMC4700/PPB/NVIC_IABR0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)ACTIVE

ACTIVE=value1

Description

Interrupt Active Bit Register 0

Fields

ACTIVE

Interrupt active flags:

0 (value1): interrupt not active

1 (value2): interrupt active

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data