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Infineon /XMC4200 /PPB /NVIC_ISER0

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Interpret as NVIC_ISER0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value3)SETENA

SETENA=value3

Description

Interrupt Set-enable Register 0

Fields

SETENA

Interrupt set-enable bits

0 (value3): interrupt disabled

1 (value4): interrupt enabled.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data