Infineon /XMC4200 /SCU_RESET /RSTCLR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RSTCLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)RSCLR 0 (value1)HIBWK 0 (value1)HIBRS 0 (value1)LCKEN

HIBWK=value1, LCKEN=value1, HIBRS=value1, RSCLR=value1

Description

RCU Reset Clear Register

Fields

RSCLR

Clear Reset Status

0 (value1): No effect

1 (value2): Clears field RSTSTAT.RSTSTAT

HIBWK

Clear Hibernate Wake-up Reset Status

0 (value1): No effect

1 (value2): De-assert reset status bit

HIBRS

Clear Hibernate Reset

0 (value1): No effect

1 (value2): De-assert reset

LCKEN

Enable Lockup Reset

0 (value1): No effect

1 (value2): Disable reset when Lockup gets asserted

Links

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