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Infineon /XMC4200 /USB0 /PCGCCTL

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Interpret as PCGCCTL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (StopPclk)StopPclk 0 (GateHclk)GateHclk

Description

Power and Clock Gating Control Register

Fields

StopPclk

Stop Pclk
GateHclk

Gate Hclk

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data