DCMSB=value1, DPCAL2=value1, DIVD=value1, DIVWC=value1, DIVA=value1, DPCAL3=value1, DPCAL0=value1, SUCAL=value1, DPCAL1=value1
Global Configuration Register
| DIVA | Divider Factor for the Analog Internal Clock 0 (value1): fADCI = fADC / 2 1 (value2): fADCI = fADC / 2 2 (value3): fADCI = fADC / 3 31 (value4): fADCI = fADC / 32 |
| DCMSB | Double Clock for the MSB Conversion 0 (value1): 1 clock cycles for the MSB (standard) 1 (value2): 2 clock cycles for the MSB (fADCI > 20 MHz) |
| DIVD | Divider Factor for the Arbiter Clock 0 (value1): fADCD = fADC 1 (value2): fADCD = fADC / 2 2 (value3): fADCD = fADC / 3 3 (value4): fADCD = fADC / 4 |
| DIVWC | Write Control for Divider Parameters 0 (value1): No write access to divider parameters 1 (value2): Bitfields DIVA, DCMSB, DIVD can be written |
| DPCAL0 | Disable Post-Calibration 0 (value1): Automatic post-calibration after each conversion of group x 1 (value2): No post-calibration |
| DPCAL1 | Disable Post-Calibration 0 (value1): Automatic post-calibration after each conversion of group x 1 (value2): No post-calibration |
| DPCAL2 | Disable Post-Calibration 0 (value1): Automatic post-calibration after each conversion of group x 1 (value2): No post-calibration |
| DPCAL3 | Disable Post-Calibration 0 (value1): Automatic post-calibration after each conversion of group x 1 (value2): No post-calibration |
| SUCAL | Start-Up Calibration 0 (value1): No action 1 (value2): Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL) |