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Infineon /XMC4500 /ETH0 /GMII_ADDRESS

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Interpret as GMII_ADDRESS

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https://regviz.com/r/Infineon/XMC4300/ETH0/GMII_ADDRESS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MB)MB 0 (MW)MW 0CR0MR0PA

Description

MII Address Register

Fields

MB

MII Busy
MW

MII Write
CR

CSR Clock Range
MR

MII Register
PA

Physical Layer Address

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data