Infineon /XMC4700 /DSD_CH0 /FCFGA

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FCFGA

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CFADF0 (value1)CFAC 0 (value1)SRGA 0 (value1)ESEL 0 (value1)EGT 0CFADCNT

CFAC=value1, ESEL=value1, EGT=value1, SRGA=value1

Description

Filter Configuration Register, Auxiliary Filter

Fields

CFADF

CIC Filter (Auxiliary) Decimation Factor

CFAC

CIC Filter (Auxiliary) Configuration

0 (value1): CIC1

1 (value2): CIC2

2 (value3): CIC3

3 (value4): CICF

SRGA

Service Request Generation Auxiliary Filter

0 (value1): Never, service requests disabled

1 (value2): Auxiliary filter: As selected by bitfields ESEL and EGT (if integrator enabled)

2 (value3): Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 3)

ESEL

Event Select

0 (value1): Always, for each new result value

1 (value2): If result is inside the boundary band

2 (value3): If result is outside the boundary band

EGT

Event Gating

0 (value1): Separate: generate events according to ESEL

1 (value2): Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDISWhile the integrator is bypassed, event gating is disabled, i.e. service requests are generated according to bitfield ESEL. The event gating suppresses service requests, result values are still stored in register RESAx.

CFADCNT

CIC Filter (Auxiliary) Decimation Counter

Links

()