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Infineon /XMC4700 /ETH0 /BUS_MODE

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Interpret as BUS_MODE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWR)SWR 0 (DA)DA 0DSL0 (ATDS)ATDS 0PBL0PR0 (FB)FB 0RPBL0 (USP)USP 0 (PBLX8)PBLX8 0 (AAL)AAL 0 (MB)MB 0 (TXPR)TXPR 0PRWG

Description

Bus Mode Register

Fields

SWR

Software Reset
DA

DMA Arbitration Scheme
DSL

Descriptor Skip Length
ATDS

Alternate Descriptor Size
PBL

Programmable Burst Length
PR

Priority Ratio
FB

Fixed Burst
RPBL

Rx DMA PBL
USP

Use Seperate PBL
PBLX8

8xPBL Mode
AAL

Address Aligned Beats
MB

Mixed Burst
TXPR

Transmit Priority
PRWG

Channel Priority Weights

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data