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Infineon /XMC4700 /GPDMA0_CH2 /CFGH

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Interpret as CFGH

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)FCMODE 0 (value1)FIFO_MODE 0PROTCTL 0SRC_PER0DEST_PER

FIFO_MODE=value1, FCMODE=value1

Description

Configuration Register High

Fields

FCMODE

Flow Control Mode

0 (value1): Source transaction requests are serviced when they occur. Data pre-fetching is enabled.

1 (value2): Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled.
FIFO_MODE

FIFO Mode Select

0 (value1): Space/data available for single AHB transfer of the specified transfer width.

1 (value2): Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer.
PROTCTL

Protection Control
SRC_PER

Source Peripheral
DEST_PER

Destination Peripheral

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data