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Infineon /XMC4700 /GPDMA1 /STATUSINT

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Interpret as STATUSINT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TFR)TFR 0 (BLOCK)BLOCK 0 (SRCT)SRCT 0 (DSTT)DSTT 0 (ERR)ERR

Description

Combined Interrupt Status Register

Fields

TFR

OR of the contents of STATUSTFR register
BLOCK

OR of the contents of STATUSBLOCK register
SRCT

OR of the contents of STATUSSRCTRAN register
DSTT

OR of the contents of STATUSDSTTRAN register
ERR

OR of the contents of STATUSERR register

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data