Regviz

Infineon /XMC4700 /PPB /HFSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as HFSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Infineon/XMC4300/PPB/HFSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)VECTTBL 0 (value1)FORCED 0 (DEBUGEVT)DEBUGEVT

FORCED=value1, VECTTBL=value1

Description

HardFault Status Register

Fields

VECTTBL

BusFault on vector table read

0 (value1): no BusFault on vector table read

1 (value2): BusFault on vector table read
FORCED

Forced HardFault

0 (value1): no forced HardFault

1 (value2): forced HardFault.
DEBUGEVT

Reserved for Debug use

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data