INTERNAL_CLOCK_STABLE=value1, SDCLOCK_EN=value1, SDCLK_FREQ_SEL=value1, INTERNAL_CLOCK_EN=value1
Clock Control Register
| INTERNAL_CLOCK_EN | Internal Clock Enable 0 (value1): Stop 1 (value2): Oscillate |
| INTERNAL_CLOCK_STABLE | Internal Clock Stable 0 (value1): Not Ready 1 (value2): Ready |
| SDCLOCK_EN | SD Clock Enable 0 (value1): Disable 1 (value2): Enable |
| SDCLK_FREQ_SEL | SDCLK Frequency Select 0 (value1): base clock(10MHz-63MHz) 1 (value2): base clock divided by 2 2 (value4): base clock divided by 4 4 (value5): base clock divided by 8 8 (value6): base clock divided by 16 16 (value3): base clock divided by 32 32 (value7): base clock divided by 64 64 (value8): base clock divided by 128 128 (value9): base clock divided by 256 |