Infineon /XMC4800 /ETH0 /TIMESTAMP_CONTROL

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Interpret as TIMESTAMP_CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TSENA)TSENA 0 (TSCFUPDT)TSCFUPDT 0 (TSINIT)TSINIT 0 (TSUPDT)TSUPDT 0 (TSTRIG)TSTRIG 0 (TSADDREG)TSADDREG 0 (TSENALL)TSENALL 0 (TSCTRLSSR)TSCTRLSSR 0 (TSVER2ENA)TSVER2ENA 0 (TSIPENA)TSIPENA 0 (TSIPV6ENA)TSIPV6ENA 0 (TSIPV4ENA)TSIPV4ENA 0 (TSEVNTENA)TSEVNTENA 0 (TSMSTRENA)TSMSTRENA 0SNAPTYPSEL 0 (TSENMACADDR)TSENMACADDR

Description

Timestamp Control Register

Fields

TSENA

Timestamp Enable

TSCFUPDT

Timestamp Fine or Coarse Update

TSINIT

Timestamp Initialize

TSUPDT

Timestamp Update

TSTRIG

Timestamp Interrupt Trigger Enable

TSADDREG

Addend Reg Update

TSENALL

Enable Timestamp for All Frames

TSCTRLSSR

Timestamp Digital or Binary Rollover Control

TSVER2ENA

Enable PTP packet Processing for Version 2 Format

TSIPENA

Enable Processing of PTP over Ethernet Frames

TSIPV6ENA

Enable Processing of PTP Frames Sent Over IPv6-UDP

TSIPV4ENA

Enable Processing of PTP Frames Sent over IPv4-UDP

TSEVNTENA

Enable Timestamp Snapshot for Event Messages

TSMSTRENA

Enable Snapshot for Messages Relevant to Master

SNAPTYPSEL

Select PTP packets for Taking Snapshots

TSENMACADDR

Enable MAC address for PTP Frame Filtering

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