Maxim-Integrated /max32650 /GPIO0 /INT_POL

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Interpret as INT_POL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (falling)GPIO_INT_POL

GPIO_INT_POL=falling

Description

GPIO Interrupt Polarity Register. Each bit in this register controls the interrupt polarity setting for one GPIO pin in the associated port.

Fields

GPIO_INT_POL

Mask of all of the pins on the port.

0 (falling): Interrupts are latched on a falling edge or low level condition for this pin.

1 (rising): Interrupts are latched on a rising edge or high condition for this pin.

Links

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