Maxim-Integrated /max32662 /ADC /FIFODMACTRL

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Interpret as FIFODMACTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)DMA_EN 0 (normal)FLUSH 0 (data_status)DATA_FORMAT 0THRESH

DATA_FORMAT=data_status, FLUSH=normal, DMA_EN=dis

Description

FIFO and DMA control

Fields

DMA_EN

DMA Enable.

0 (dis): Disable DMA.

1 (en): Enable DMA.

FLUSH

FIFO Flush.

0 (normal): Normal FIFO operation.

1 (flush): Flush FIFO.

DATA_FORMAT

DATA format control.

0 (data_status): Data and Status in FIFO.

1 (data_only): Only Data in FIFO.

2 (raw_data_only): Only Raw Data in FIFO.

THRESH

FIFO Threshold. These bits define the FIFO interrupt threshold.

Links

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