Timer Configuration Register.
| CLKSEL_A | Timer Clock Select for Timer A |
| CLKEN_A | Timer A Enable Status |
| CLKRDY_A | CLK_TMR Ready Flag for Timer A |
| EVENT_SEL_A | Event Select for Timer A |
| NEGTRIG_A | Negative Edge Trigger for Event for Timer A |
| IE_A | Interrupt Enable for Timer A |
| CAPEVENT_SEL_A | Capture Event Select for Timer A |
| SW_CAPEVENT_A | Software Capture Event for Timer A |
| WE_A | Wake-Up Enable for Timer A |
| OUTEN_A | OUT_OE_O Enable for Modes 0, 1,and 5 for Timer A |
| OUTBEN_A | PWM_CKB_EN_O Enable for Modes other than Mode 3 for Timer A |
| ASYNC | Allows asynchronous reads to the PWM and CNT registers. |
| CLKSEL_B | Timer Clock Select for Timer B |
| CLKEN_B | Timer B Enable Status |
| CLKRDY_B | CLK_TMR Ready Flag for Timer B |
| EVENT_SEL_B | Event Select for Timer B |
| NEGTRIG_B | Negative Edge Trigger for Event for Timer B |
| IE_B | Interrupt Enable for Timer B |
| CAPEVENT_SEL_B | Capture Event Select for Timer B |
| SW_CAPEVENT_B | Software Capture Event for Timer B |
| WE_B | Wake-Up Enable for Timer B |
| CASCADE | Cascade two 16-bit timers into one 32-bit timer. Only available when C_TMR16=0 adn C_DUALTMR16=1. |