Maxim-Integrated /max32680 /GCR /RST1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RST1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (reset_done)I2C1 0 (PT)PT 0 (OWM)OWM 0 (CRC)CRC 0 (AES)AES 0 (SPI0)SPI0 0 (SMPHR)SMPHR 0 (I2S)I2S 0 (I2C2)I2C2 0 (DVS)DVS 0 (SIMO)SIMO 0 (CPU1)CPU1

I2C1=reset_done

Description

Reset 1.

Fields

I2C1

I2C1 Reset.

0 (reset_done): Reset complete.

1 (busy): Starts reset or indicates reset in progress.

PT

PT Reset.

OWM

OWM Reset.

CRC

CRC Reset.

AES

AES Reset.

SPI0

SPI 0 Reset.

SMPHR

SMPHR Reset.

I2S

I2S Reset.

I2C2

I2C2 Reset.

DVS

DVS Reset.

SIMO

SIMO Reset.

CPU1

CPU1 Reset.

Links

()