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Maxim-Integrated /max32680 /LPGCR /RST

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Interpret as RST

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (reset_done)GPIO2 0 (WDT1)WDT1 0 (TMR4)TMR4 0 (TMR5)TMR5 0 (UART3)UART3 0 (LPCOMP)LPCOMP

GPIO2=reset_done

Description

Low Power Reset Register.

Fields

GPIO2

Low Power GPIO 2 Reset.

0 (reset_done): Reset complete.

1 (busy): Starts Reset or indicates reset in progress.
WDT1

Low Power Watchdog Timer 1 Reset.
TMR4

Low Power Timer 4 Reset.
TMR5

Low Power Timer 5 Reset.
UART3

Low Power UART 3 Reset.
LPCOMP

Low Power Comparator Reset.

Links

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Register Reference

https://github.com/analogdevicesinc/msdk