adc_divsel=DIV1, ch_sel=AIN0
ADC Control
| start | Start ADC Conversion |
| pwr | ADC Power Up |
| refbuf_pwr | ADC Reference Buffer Power Up |
| ref_sel | ADC Reference Select |
| ref_scale | ADC Reference Scale |
| scale | ADC Scale |
| clk_en | ADC Clock Enable |
| ch_sel | ADC Channel Select 0 (AIN0): undefined 1 (AIN1): undefined 2 (AIN2): undefined 3 (AIN3): undefined 4 (AIN4): undefined 5 (AIN5): undefined 6 (AIN6): undefined 7 (AIN7): undefined 8 (VcoreA): undefined 9 (VcoreB): undefined 10 (Vrxout): undefined 11 (Vtxout): undefined 12 (VddA): undefined 13 (VddB): VddB/4 14 (Vddio): Vddio/4 15 (Vddioh): Vddioh/4 16 (VregI): VregI/4 |
| adc_divsel | Scales the external inputs, all inputs are scaled the same 0 (DIV1): undefined 1 (DIV2): undefined 2 (DIV3): undefined 3 (DIV4): undefined |
| data_align | ADC Data Alignment Select |