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Maxim-Integrated /max78000 /SPI0 /CLKCTRL

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Interpret as CLKCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Dis)LO0 (Dis)HI0CLKDIV

HI=Dis, LO=Dis

Description

Register for controlling SPI clock rate.

Fields

LO

Low duty cycle control. In timer mode, reload[7:0].

0 (Dis): Duty cycle control of serial clock generation is disabled.
HI

High duty cycle control. In timer mode, reload[15:8].

0 (Dis): Duty cycle control of serial clock generation is disabled.
CLKDIV

System Clock scale factor. Scales the AMBA clock by 2^SCALE before generating serial clock.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk