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STMicroelectronics /STM32F072x /CEC /CFGR

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Interpret as CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OAR0 (LSTN)LSTN 0SFT0 (RXTOL)RXTOL 0 (BRESTP)BRESTP 0 (BREGEN)BREGEN 0 (LBPEGEN)LBPEGEN

Description

configuration register

Fields

OAR

Own Address
LSTN

Listen mode
SFT

Signal Free Time
RXTOL

Rx-Tolerance
BRESTP

Rx-stop on bit rising error
BREGEN

Generate error-bit on bit rising error
LBPEGEN

Generate Error-Bit on Long Bit Period Error

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data