Regviz

STMicroelectronics /STM32F102xx /RCC /BDCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as BDCR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32F107xx/RCC/BDCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSEON)LSEON 0 (LSERDY)LSERDY 0 (LSEBYP)LSEBYP 0RTCSEL 0 (RTCEN)RTCEN 0 (BDRST)BDRST

Description

Backup domain control register (RCC_BDCR)

Fields

LSEON

External Low Speed oscillator enable
LSERDY

External Low Speed oscillator ready
LSEBYP

External Low Speed oscillator bypass
RTCSEL

RTC clock source selection
RTCEN

RTC clock enable
BDRST

Backup domain software reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data