STMicroelectronics /STM32F413 /RCC /CIR

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Interpret as CIR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSIRDYF)LSIRDYF 0 (LSERDYF)LSERDYF 0 (HSIRDYF)HSIRDYF 0 (HSERDYF)HSERDYF 0 (PLLRDYF)PLLRDYF 0 (PLLI2SRDYF)PLLI2SRDYF 0 (CSSF)CSSF 0 (LSIRDYIE)LSIRDYIE 0 (LSERDYIE)LSERDYIE 0 (HSIRDYIE)HSIRDYIE 0 (HSERDYIE)HSERDYIE 0 (PLLRDYIE)PLLRDYIE 0 (PLLI2SRDYIE)PLLI2SRDYIE 0 (LSIRDYC)LSIRDYC 0 (LSERDYC)LSERDYC 0 (HSIRDYC)HSIRDYC 0 (HSERDYC)HSERDYC 0 (PLLRDYC)PLLRDYC 0 (PLLI2SRDYC)PLLI2SRDYC 0 (CSSC)CSSC

Description

clock interrupt register

Fields

LSIRDYF

LSI ready interrupt flag

LSERDYF

LSE ready interrupt flag

HSIRDYF

HSI ready interrupt flag

HSERDYF

HSE ready interrupt flag

PLLRDYF

Main PLL (PLL) ready interrupt flag

PLLI2SRDYF

PLLI2S ready interrupt flag

CSSF

Clock security system interrupt flag

LSIRDYIE

LSI ready interrupt enable

LSERDYIE

LSE ready interrupt enable

HSIRDYIE

HSI ready interrupt enable

HSERDYIE

HSE ready interrupt enable

PLLRDYIE

Main PLL (PLL) ready interrupt enable

PLLI2SRDYIE

PLLI2S ready interrupt enable

LSIRDYC

LSI ready interrupt clear

LSERDYC

LSE ready interrupt clear

HSIRDYC

HSI ready interrupt clear

HSERDYC

HSE ready interrupt clear

PLLRDYC

Main PLL(PLL) ready interrupt clear

PLLI2SRDYC

PLLI2S ready interrupt clear

CSSC

Clock security system interrupt clear

Links

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