STMicroelectronics /STM32F427 /FPU /FPSCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FPSCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IOC)IOC 0 (DZC)DZC 0 (OFC)OFC 0 (UFC)UFC 0 (IXC)IXC 0 (IDC)IDC 0RMode 0 (FZ)FZ 0 (DN)DN 0 (AHP)AHP 0 (V)V0 (C)C0 (Z)Z0 (N)N

Description

Floating-point status control register

Fields

IOC

Invalid operation cumulative exception bit

DZC

Division by zero cumulative exception bit.

OFC

Overflow cumulative exception bit

UFC

Underflow cumulative exception bit

IXC

Inexact cumulative exception bit

IDC

Input denormal cumulative exception bit.

RMode

Rounding Mode control field

FZ

Flush-to-zero mode control bit:

DN

Default NaN mode control bit

AHP

Alternative half-precision control bit

V

Overflow condition code flag

C

Carry condition code flag

Z

Zero condition code flag

N

Negative condition code flag

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