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STMicroelectronics /STM32F730 /SAI1 /BCLRFR

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Interpret as BCLRFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (COVRUDR)COVRUDR 0 (CMUTEDET)CMUTEDET 0 (CWCKCFG)CWCKCFG 0 (CCNRDY)CCNRDY 0 (CAFSDET)CAFSDET 0 (CLFSDET)CLFSDET

Description

BClear flag register

Fields

COVRUDR

Clear overrun / underrun
CMUTEDET

Mute detection flag
CWCKCFG

Clear wrong clock configuration flag
CCNRDY

Clear codec not ready flag
CAFSDET

Clear anticipated frame synchronization detection flag
CLFSDET

Clear late frame synchronization detection flag

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data