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STMicroelectronics /STM32F745 /CEC /CFGR

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Interpret as CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SFT0 (RXTOL)RXTOL 0 (BRESTP)BRESTP 0 (BREGEN)BREGEN 0 (LBPEGEN)LBPEGEN 0 (BRDNOGEN)BRDNOGEN 0 (SFTOP)SFTOP 0OAR0 (LSTN)LSTN

Description

configuration register

Fields

SFT

Signal Free Time
RXTOL

Rx-Tolerance
BRESTP

Rx-stop on bit rising error
BREGEN

Generate error-bit on bit rising error
LBPEGEN

Generate Error-Bit on Long Bit Period Error
BRDNOGEN

Avoid Error-Bit Generation in Broadcast
SFTOP

SFT Option Bit
OAR

Own addresses configuration
LSTN

Listen mode

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data