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STMicroelectronics /STM32F750 /CRYP /SR

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Interpret as SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IFEM)IFEM 0 (IFNF)IFNF 0 (OFNE)OFNE 0 (OFFU)OFFU 0 (BUSY)BUSY

Description

status register

Fields

IFEM

Input FIFO empty
IFNF

Input FIFO not full
OFNE

Output FIFO not empty
OFFU

Output FIFO full
BUSY

Busy bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data