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STMicroelectronics /STM32F765 /CRYP /MISR

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Interpret as MISR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INMIS)INMIS 0 (OUTMIS)OUTMIS

Description

masked interrupt status register

Fields

INMIS

Input FIFO service masked interrupt status
OUTMIS

Output FIFO service masked interrupt status

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data