STMicroelectronics /STM32F7x /RCC /AHB1ENR

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Interpret as AHB1ENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOAEN)GPIOAEN 0 (GPIOBEN)GPIOBEN 0 (GPIOCEN)GPIOCEN 0 (GPIODEN)GPIODEN 0 (GPIOEEN)GPIOEEN 0 (GPIOFEN)GPIOFEN 0 (GPIOGEN)GPIOGEN 0 (GPIOHEN)GPIOHEN 0 (GPIOIEN)GPIOIEN 0 (GPIOJEN)GPIOJEN 0 (GPIOKEN)GPIOKEN 0 (CRCEN)CRCEN 0 (BKPSRAMEN)BKPSRAMEN 0 (CCMDATARAMEN)CCMDATARAMEN 0 (DMA1EN)DMA1EN 0 (DMA2EN)DMA2EN 0 (DMA2DEN)DMA2DEN 0 (ETHMACEN)ETHMACEN 0 (ETHMACTXEN)ETHMACTXEN 0 (ETHMACRXEN)ETHMACRXEN 0 (ETHMACPTPEN)ETHMACPTPEN 0 (OTGHSEN)OTGHSEN 0 (OTGHSULPIEN)OTGHSULPIEN

Description

AHB1 peripheral clock register

Fields

GPIOAEN

IO port A clock enable

GPIOBEN

IO port B clock enable

GPIOCEN

IO port C clock enable

GPIODEN

IO port D clock enable

GPIOEEN

IO port E clock enable

GPIOFEN

IO port F clock enable

GPIOGEN

IO port G clock enable

GPIOHEN

IO port H clock enable

GPIOIEN

IO port I clock enable

GPIOJEN

IO port J clock enable

GPIOKEN

IO port K clock enable

CRCEN

CRC clock enable

BKPSRAMEN

Backup SRAM interface clock enable

CCMDATARAMEN

CCM data RAM clock enable

DMA1EN

DMA1 clock enable

DMA2EN

DMA2 clock enable

DMA2DEN

DMA2D clock enable

ETHMACEN

Ethernet MAC clock enable

ETHMACTXEN

Ethernet Transmission clock enable

ETHMACRXEN

Ethernet Reception clock enable

ETHMACPTPEN

Ethernet PTP clock enable

OTGHSEN

USB OTG HS clock enable

OTGHSULPIEN

USB OTG HSULPI clock enable

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