Control register 2
| ADDM7 | 7-bit Address Detection/4-bit Address Detection |
| LBDL | LIN break detection length |
| LBDIE | LIN break detection interrupt enable |
| LBCL | Last bit clock pulse |
| CPHA | Clock phase |
| CPOL | Clock polarity |
| CLKEN | Clock enable |
| STOP | STOP bits |
| LINEN | LIN mode enable |
| SWAP | Swap TX/RX pins |
| RXINV | RX pin active level inversion |
| TXINV | TX pin active level inversion |
| TAINV | Binary data inversion |
| MSBFIRST | Most significant bit first |
| ABREN | Auto baud rate enable |
| ABRMOD0 | ABRMOD0 |
| ABRMOD1 | Auto baud rate mode |
| RTOEN | Receiver timeout enable |
| ADD0_3 | Address of the USART node |
| ADD4_7 | Address of the USART node |