STMicroelectronics /STM32F7x2 /USBPHYC /TUNE

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Interpret as TUNE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INCURREN)INCURREN 0 (INCURRINT)INCURRINT 0 (LFSCAPEN)LFSCAPEN 0 (HSDRVSLEW)HSDRVSLEW 0 (HSDRVDCCUR)HSDRVDCCUR 0 (HSDRVDCLEV)HSDRVDCLEV 0 (HSDRVCURINCR)HSDRVCURINCR 0 (FSDRVRFADJ)FSDRVRFADJ 0 (HSDRVRFRED)HSDRVRFRED 0HSDRVCHKITRM 0HSDRVCHKZTRM 0SQLCHCTL 0 (HDRXGNEQEN)HDRXGNEQEN 0 (STAGSEL)STAGSEL 0 (HSFALLPREEM)HSFALLPREEM 0HSRXOFF 0 (SHTCCTCTLPROT)SHTCCTCTLPROT 0 (SQLBYP)SQLBYP

Description

USBPHYC tuning control register

Fields

INCURREN

Controls the current boosting function

INCURRINT

Controls PHY current boosting

LFSCAPEN

: Enables the Low Full Speed feedback capacitor

HSDRVSLEW

Controls the HS driver slew rate

HSDRVDCCUR

Decreases the HS driver DC level

HSDRVDCLEV

Increases the HS Driver DC level. Not applicable during the HS Test J and Test K data transfer

HSDRVCURINCR

Enable the HS driver current increase feature

FSDRVRFADJ

Tuning pin to adjust the full speed rise/fall time

HSDRVRFRED

High Speed rise-fall reduction enable

HSDRVCHKITRM

HS Driver current trimming pins for choke compensation

HSDRVCHKZTRM

Controls the PHY bus HS driver impedance tuning for choke compensation

SQLCHCTL

Adjust the squelch DC threshold value

HDRXGNEQEN

Enables the HS Rx Gain Equalizer

STAGSEL

HS Tx staggering enable

HSFALLPREEM

HS Fall time control of single ended signals during pre-emphasis

HSRXOFF

: HS Receiver Offset adjustment

SHTCCTCTLPROT

Enables the short circuit protection circuitry in LS/FS driver

SQLBYP

This pin is used to bypass the squelch inter-locking circuitry

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