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STMicroelectronics /STM32F7x6 /FMC /BCR2

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Interpret as BCR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MBKEN)MBKEN 0 (MUXEN)MUXEN 0MTYP 0MWID 0 (FACCEN)FACCEN 0 (BURSTEN)BURSTEN 0 (WAITPOL)WAITPOL 0 (WRAPMOD)WRAPMOD 0 (WAITCFG)WAITCFG 0 (WREN)WREN 0 (WAITEN)WAITEN 0 (EXTMOD)EXTMOD 0 (ASYNCWAIT)ASYNCWAIT 0 (CBURSTRW)CBURSTRW

Description

SRAM/NOR-Flash chip-select control register 2

Fields

MBKEN

MBKEN
MUXEN

MUXEN
MTYP

MTYP
MWID

MWID
FACCEN

FACCEN
BURSTEN

BURSTEN
WAITPOL

WAITPOL
WRAPMOD

WRAPMOD
WAITCFG

WAITCFG
WREN

WREN
WAITEN

WAITEN
EXTMOD

EXTMOD
ASYNCWAIT

ASYNCWAIT
CBURSTRW

CBURSTRW

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data