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STMicroelectronics /STM32G031 /PWR /PDCRD

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Interpret as PDCRD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3 0 (PD4)PD4 0 (PD5)PD5 0 (PD6)PD6 0 (PD8)PD8 0 (PD9)PD9

Description

Power Port D pull-down control register

Fields

PD0

Port D pull-down bit y (y=0…15)
PD1

Port D pull-down bit y (y=0…15)
PD2

Port D pull-down bit y (y=0…15)
PD3

Port D pull-down bit y (y=0…15)
PD4

Port D pull-down bit y (y=0…15)
PD5

Port D pull-down bit y (y=0…15)
PD6

Port D pull-down bit y (y=0…15)
PD8

Port D pull-down bit y (y=0…15)
PD9

Port D pull-down bit y (y=0…15)

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data