STMicroelectronics /STM32G031 /VREFBUF /CSR

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Interpret as CSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENVR)ENVR 0 (HIZ)HIZ 0 (VRR)VRR 0VRS

Description

VREFBUF control and status register

Fields

ENVR

Voltage reference buffer mode enable This bit is used to enable the voltage reference buffer mode.

HIZ

High impedance mode This bit controls the analog switch to connect or not the VREF+ pin. Refer to Table196: VREF buffer modes for the mode descriptions depending on ENVR bit configuration.

VRR

Voltage reference buffer ready

VRS

Voltage reference scale These bits select the value generated by the voltage reference buffer. Other: Reserved

Links

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