STMicroelectronics /STM32G041 /ADC /CFGR1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAEN)DMAEN 0 (DMACFG)DMACFG 0 (SCANDIR)SCANDIR 0RES0 (ALIGN)ALIGN 0EXTSEL 0EXTEN 0 (OVRMOD)OVRMOD 0 (CONT)CONT 0 (WAIT)WAIT 0 (AUTOFF)AUTOFF 0 (DISCEN)DISCEN 0 (CHSELRMOD)CHSELRMOD 0 (AWD1SGL)AWD1SGL 0 (AWD1EN)AWD1EN 0AWDCH1CH

Description

ADC configuration register 1

Fields

DMAEN

ADC DMA transfer enable

DMACFG

ADC DMA transfer configuration

SCANDIR

Scan sequence direction

RES

ADC data resolution

ALIGN

ADC data alignement

EXTSEL

ADC group regular external trigger source

EXTEN

ADC group regular external trigger polarity

OVRMOD

ADC group regular overrun configuration

CONT

ADC group regular continuous conversion mode

WAIT

Wait conversion mode

AUTOFF

Auto-off mode

DISCEN

ADC group regular sequencer discontinuous mode

CHSELRMOD

Mode selection of the ADC_CHSELR register

AWD1SGL

ADC analog watchdog 1 monitoring a single channel or all channels

AWD1EN

ADC analog watchdog 1 enable on scope ADC group regular

AWDCH1CH

ADC analog watchdog 1 monitored channel selection

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