PLL configuration register
| PLLSRC | PLL input clock source |
| PLLM | Division factor M of the PLL input clock divider |
| PLLN | PLL frequency multiplication factor N |
| PLLPEN | PLLPCLK clock output enable |
| PLLP | PLL VCO division factor P for PLLPCLK clock output |
| PLLQEN | PLLQCLK clock output enable |
| PLLQ | PLL VCO division factor Q for PLLQCLK clock output |
| PLLREN | PLLRCLK clock output enable |
| PLLR | PLL VCO division factor R for PLLRCLK clock output |