TAMPOE=B_0x0, WUCKSEL=B_0x0, SUB1H=B_0x0, TAMPALRM_PU=B_0x0, ALRAE=B_0x0, POL=B_0x0, ITSE=B_0x0, FMT=B_0x0, TSIE=B_0x0, TAMPALRM_TYPE=B_0x0, WUTE=B_0x0, ADD1H=B_0x0, REFCKON=B_0x0, TAMPTS=B_0x0, ALRAIE=B_0x0, COSEL=B_0x0, OSEL=B_0x0, TSEDGE=B_0x0, ALRBE=B_0x0, ALRBIE=B_0x0, COE=B_0x0, WUTIE=B_0x0, TSE=B_0x0, BYPSHAD=B_0x0
control register
WUCKSEL | ck_wut wakeup clock selection 10x: ck_spre (usually 1Hz) clock is selected 11x: ck_spre (usually 1Hz) clock is selected and 216is added to the WUT counter value 0 (B_0x0): RTC/16 clock is selected 1 (B_0x1): RTC/8 clock is selected 2 (B_0x2): RTC/4 clock is selected 3 (B_0x3): RTC/2 clock is selected |
TSEDGE | Timestamp event active edge TSE must be reset when TSEDGE is changed to avoid unwanted TSF setting. 0 (B_0x0): RTC_TS input rising edge generates a timestamp event 1 (B_0x1): RTC_TS input falling edge generates a timestamp event |
REFCKON | RTC_REFIN reference clock detection enable (50 or 60Hz) Note: PREDIV_S must be 0x00FF. 0 (B_0x0): RTC_REFIN detection disabled 1 (B_0x1): RTC_REFIN detection enabled |
BYPSHAD | Bypass the shadow registers Note: If the frequency of the APB1 clock is less than seven times the frequency of RTCCLK, BYPSHAD must be set to 1. 0 (B_0x0): Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken from the shadow registers, which are updated once every two RTCCLK cycles. 1 (B_0x1): Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken directly from the calendar counters. |
FMT | Hour format 0 (B_0x0): 24 hour/day format 1 (B_0x1): AM/PM hour format |
ALRAE | Alarm A enable 0 (B_0x0): Alarm A disabled 1 (B_0x1): Alarm A enabled |
ALRBE | Alarm B enable 0 (B_0x0): Alarm B disabled 1 (B_0x1): Alarm B enabled |
WUTE | Wakeup timer enable Note: When the wakeup timer is disabled, wait for WUTWF=1 before enabling it again. 0 (B_0x0): Wakeup timer disabled 1 (B_0x1): Wakeup timer enabled |
TSE | timestamp enable 0 (B_0x0): timestamp disable 1 (B_0x1): timestamp enable |
ALRAIE | Alarm A interrupt enable 0 (B_0x0): Alarm A interrupt disabled 1 (B_0x1): Alarm A interrupt enabled |
ALRBIE | Alarm B interrupt enable 0 (B_0x0): Alarm B interrupt disable 1 (B_0x1): Alarm B interrupt enable |
WUTIE | Wakeup timer interrupt enable 0 (B_0x0): Wakeup timer interrupt disabled 1 (B_0x1): Wakeup timer interrupt enabled |
TSIE | Timestamp interrupt enable 0 (B_0x0): Timestamp interrupt disable 1 (B_0x1): Timestamp interrupt enable |
ADD1H | Add 1 hour (summer time change) When this bit is set outside initialization mode, 1 hour is added to the calendar time. This bit is always read as 0. 0 (B_0x0): No effect 1 (B_0x1): Adds 1 hour to the current time. This can be used for summer time change |
SUB1H | Subtract 1 hour (winter time change) When this bit is set outside initialization mode, 1 hour is subtracted to the calendar time if the current hour is not 0. This bit is always read as 0. Setting this bit has no effect when current hour is 0. 0 (B_0x0): No effect 1 (B_0x1): Subtracts 1 hour to the current time. This can be used for winter time change. |
BKP | Backup This bit can be written by the user to memorize whether the daylight saving time change has been performed or not. |
COSEL | Calibration output selection When COE = 1, this bit selects which signal is output on CALIB. These frequencies are valid for RTCCLK at 32.768kHz and prescalers at their default values (PREDIV_A = 127 and PREDIV_S = 255). Refer to . 0 (B_0x0): Calibration output is 512Hz 1 (B_0x1): Calibration output is 1Hz |
POL | Output polarity This bit is used to configure the polarity of TAMPALRM output. 0 (B_0x0): The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0]), or when a TAMPxF/ITAMPxF is asserted (if TAMPOE = 1). 1 (B_0x1): The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0]), or when a TAMPxF/ITAMPxF is asserted (if TAMPOE = 1). |
OSEL | Output selection These bits are used to select the flag to be routed to TAMPALRM output. 0 (B_0x0): Output disabled 1 (B_0x1): Alarm A output enabled 2 (B_0x2): Alarm B output enabled 3 (B_0x3): Wakeup output enabled |
COE | Calibration output enable This bit enables the CALIB output 0 (B_0x0): Calibration output disabled 1 (B_0x1): Calibration output enabled |
ITSE | timestamp on internal event enable 0 (B_0x0): internal event timestamp disabled 1 (B_0x1): internal event timestamp enabled |
TAMPTS | Activate timestamp on tamper detection event TAMPTS is valid even if TSE = 0 in the RTC_CR register. Timestamp flag is set after the tamper flags, therefore if TAMPTS and TSIE are set, it is recommended to disable the tamper interrupts in order to avoid servicing 2 interrupts. 0 (B_0x0): Tamper detection event does not cause a RTC timestamp to be saved 1 (B_0x1): Save RTC timestamp on tamper detection event |
TAMPOE | Tamper detection output enable on TAMPALRM 0 (B_0x0): The tamper flag is not routed on TAMPALRM 1 (B_0x1): The tamper flag is routed on TAMPALRM, combined with the signal provided by OSEL and with the polarity provided by POL. |
TAMPALRM_PU | TAMPALRM pull-up enable 0 (B_0x0): No pull-up is applied on TAMPALRM output 1 (B_0x1): A pull-up is applied on TAMPALRM output |
TAMPALRM_TYPE | TAMPALRM output type 0 (B_0x0): TAMPALRM is push-pull output 1 (B_0x1): TAMPALRM is open-drain output |
OUT2EN | RTC_OUT2 output enable Setting this bit allows to remap the RTC outputs on RTC_OUT2 as follows: OUT2EN = 0: RTC output 2 disable If OSEL â 00 or TAMPOE = 1: TAMPALRM is output on RTC_OUT1 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT1 OUT2EN = 1: RTC output 2 enable If (OSEL â 00 or TAMPOE = 1) and COE = 0: TAMPALRM is output on RTC_OUT2 If OSEL = 00 and TAMPOE = 0 and COE = 1: CALIB is output on RTC_OUT2 If (OSELâ 00 or TAMPOE = 1) and COE = 1: CALIB is output on RTC_OUT2 and TAMPALRM is output on RTC_OUT1. |