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STMicroelectronics /STM32G050 /SYSCFG /CFGR2

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Interpret as CFGR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LOCKUP_LOCK)LOCKUP_LOCK 0 (SRAM_PARITY_LOCK)SRAM_PARITY_LOCK 0 (ECC_LOCK)ECC_LOCK 0 (SRAM_PEF)SRAM_PEF

Description

SYSCFG configuration register 1

Fields

LOCKUP_LOCK

Cortex-M0+ LOCKUP bit enable bit
SRAM_PARITY_LOCK

SRAM parity lock bit
ECC_LOCK

ECC error lock bit
SRAM_PEF

SRAM parity error flag

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data