TSEN=B_0x0, VBATEN=B_0x0, VREFEN=B_0x0, PRESC=B_0x0
ADC common configuration register
| PRESC | ADC prescaler Set and cleared by software to select the frequency of the clock to the ADC. Other: Reserved Note: Software is allowed to write these bits only when the ADC is disabled (ADCALÂ =Â 0, ADSTARTÂ =Â 0, ADSTPÂ =Â 0, ADDISÂ =Â 0 and ADENÂ =Â 0). 0 (B_0x0): input ADC clock not divided 1 (B_0x1): input ADC clock divided by 2 2 (B_0x2): input ADC clock divided by 4 3 (B_0x3): input ADC clock divided by 6 4 (B_0x4): input ADC clock divided by 8 5 (B_0x5): input ADC clock divided by 10 6 (B_0x6): input ADC clock divided by 12 7 (B_0x7): input ADC clock divided by 16 8 (B_0x8): input ADC clock divided by 32 9 (B_0x9): input ADC clock divided by 64 10 (B_0xA): input ADC clock divided by 128 11 (B_0xB): input ADC clock divided by 256 |
| VREFEN | VREFINT enable This bit is set and cleared by software to enable/disable the VREFINT. Note: Software is allowed to write this bit only when ADSTARTÂ =Â 0 (which ensures that no conversion is ongoing). 0 (B_0x0): VREFINT disabled 1 (B_0x1): VREFINT enabled |
| TSEN | Temperature sensor enable This bit is set and cleared by software to enable/disable the temperature sensor. Note: Software is allowed to write this bit only when ADSTARTÂ =Â 0 (which ensures that no conversion is ongoing). 0 (B_0x0): Temperature sensor disabled, DAC_OUT1 connected to ADC channel 12 1 (B_0x1): Temperature sensor enabled |
| VBATEN | VBAT enable This bit is set and cleared by software to enable/disable the VBAT channel. Note: The software is allowed to write this bit only when ADSTARTÂ =Â 0 (which ensures that no conversion is ongoing) 0 (B_0x0): VBAT channel disabled, DAC_OUT2 connected to ADC channel 14 1 (B_0x1): VBAT channel enabled |