SBPEIE=B_0x0, ARBLSTIE=B_0x0, TXERRIE=B_0x0, TXUDRIE=B_0x0, RXBRIE=B_0x0, RXACKIE=B_0x0, TXBRIE=B_0x0, TXENDIE=B_0x0, LBPEIE=B_0x0, TXACKIE=B_0x0, BREIE=B_0x0, RXOVRIE=B_0x0, RXENDIE=B_0x0
CEC interrupt enable register
| RXBRIE | Rx-byte received interrupt enable The RXBRIE bit is set and cleared by software. 0 (B_0x0): RXBR interrupt disabled 1 (B_0x1): RXBR interrupt enabled |
| RXENDIE | End of reception interrupt enable The RXENDIE bit is set and cleared by software. 0 (B_0x0): RXEND interrupt disabled 1 (B_0x1): RXEND interrupt enabled |
| RXOVRIE | Rx-buffer overrun interrupt enable The RXOVRIE bit is set and cleared by software. 0 (B_0x0): RXOVR interrupt disabled 1 (B_0x1): RXOVR interrupt enabled |
| BREIE | Bit rising error interrupt enable The BREIE bit is set and cleared by software. 0 (B_0x0): BRE interrupt disabled 1 (B_0x1): BRE interrupt enabled |
| SBPEIE | Short bit period error interrupt enable The SBPEIE bit is set and cleared by software. 0 (B_0x0): SBPE interrupt disabled 1 (B_0x1): SBPE interrupt enabled |
| LBPEIE | Long bit period error interrupt enable The LBPEIE bit is set and cleared by software. 0 (B_0x0): LBPE interrupt disabled 1 (B_0x1): LBPE interrupt enabled |
| RXACKIE | Rx-missing acknowledge error interrupt enable The RXACKIE bit is set and cleared by software. 0 (B_0x0): RXACKE interrupt disabled 1 (B_0x1): RXACKE interrupt enabled |
| ARBLSTIE | Arbitration lost interrupt enable The ARBLSTIE bit is set and cleared by software. 0 (B_0x0): ARBLST interrupt disabled 1 (B_0x1): ARBLST interrupt enabled |
| TXBRIE | Tx-byte request interrupt enable The TXBRIE bit is set and cleared by software. 0 (B_0x0): TXBR interrupt disabled 1 (B_0x1): TXBR interrupt enabled |
| TXENDIE | Tx-end of message interrupt enable The TXENDIE bit is set and cleared by software. 0 (B_0x0): TXEND interrupt disabled 1 (B_0x1): TXEND interrupt enabled |
| TXUDRIE | Tx-underrun interrupt enable The TXUDRIE bit is set and cleared by software. 0 (B_0x0): TXUDR interrupt disabled 1 (B_0x1): TXUDR interrupt enabled |
| TXERRIE | Tx-error interrupt enable The TXERRIE bit is set and cleared by software. 0 (B_0x0): TXERR interrupt disabled 1 (B_0x1): TXERR interrupt enabled |
| TXACKIE | Tx-missing acknowledge error interrupt enable The TXACKEIE bit is set and cleared by software. 0 (B_0x0): TXACKE interrupt disabled 1 (B_0x1): TXACKE interrupt enabled |